Electrical Properties and Interfacial Strain in Thermally Oxidized 4H‐SiC MOS Structures Under Different Post‐Oxidation Annealing

Roccaforte, Fabrizio and Panasci, Salvatore Ethan and Votadoro, Valerio and Di Franco, Salvatore and Vivona, Marilena and Milazzo, Simone and Zignale, Marco and Giannazzo, Filippo and Pécz, Béla and Fiorenza, Patrick (2026) Electrical Properties and Interfacial Strain in Thermally Oxidized 4H‐SiC MOS Structures Under Different Post‐Oxidation Annealing. ADVANCED ELECTRONIC MATERIALS. No. e70561. ISSN 2199-160X (In Press)

Text AdvElectMaterials-2026-Roccaforte-ElectricalPropertiesandInterfacialStraininThermallyOxidized4HSiCMOS.pdf - Published Version Available under License Creative Commons Attribution. Download (2MB)

Abstract

The electrical behavior of SiO 2 /4H‐SiC interfaces is a central challenge for the development of high‐efficiency MOSFETs, where trap states and interfacial structural distortions can affect carrier mobility and device reliability. In this work, we investigate thermally grown SiO 2 on n‐type 4H‐SiC epilayers, analyzing the effects of different post‐oxidation annealings (POAs) in N 2 and Ar on both the electrical response and the interfacial strain. MOS capacitors subjected to POA in N 2 exhibit a marked reduction of interface states density (D it ) near the conduction band edge, together with an increase of the electron Fowler–Nordheim barrier height. These electrical signatures occur simultaneously with negative flat‐band voltage shifts, suggesting the presence of an interfacial dipole rather than the presence of fixed charges only. Raman spectroscopy reveals that N 2 ‐based POA induces an increase of biaxial tensile strain at the SiO 2 /SiC interface, which is less pronounced in the case of POA in Ar. The observation of strain evolution and electrical properties demonstrates that nitrogen incorporation not only passivates dangling bonds but also modifies the interfacial stress state, thereby influencing barrier properties and charge distribution. These findings provide new insights to be considered in the optimization of SiO 2 /SiC gate stacks in 4H‐SiC MOSFETs.

Actions (login required)

View Item